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Comparison ledger

RIE-10versus110

SPTS RIE-10, Tegal 110, side by side. Every value shown is drawn from the cited encyclopedia entries.

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Side-by-side comparison of selected equipment models
Attribute
RIE-10SPTS
110Tegal
OEMSPTSTegal
CategoryEtchEtch
Wafer size6-inch wafers—
Process node——
Introduced——
Production run——
Lifecycle——
Lifecycle milestones——
Control system——
Generation——
FamilySPTS RIE-10Tegal 110
Cited variants—
Specifications
Etch rate6–10 µm/min[2]—
Aspect ratio50:1[2]—
Selectivity to resist>50:1[2]—
Selectivity to silicon oxide>100:1[2]—
Uniformity<5% across 6-inch wafers[2]—
Primary RF powerup to 3,000 W[2]—
Secondary RF powerup to 3,000 W[2]—
Substrate powerup to 300 W[2]—
Chuck temperature range-15°C to +40°C[2]—
Sample size handling6-inch or smaller samples[2]—
End point detectorClaritas End Point Detector[2]—
Wafer size6-inch wafers[3]—
Tool typedeep silicon etching system[2]—
Plasma sourcesdual plasma sources[2]—
Gas inletsdual gas inlets[2]—
Fixed RF matchingyes[2]—
Dual plasma sourcesyes[2]—
Dual gas inletsyes[2]—
Side wall roughness (scallop depth)<6 nm for nanoscale features; range 6–700 nm[2]—
Wafer handling6-inch or smaller samples[2]—
Endpoint detectorClaritas End Point Detector[2]—
Side wall roughness<6 nm for nanoscale features[2]—
model—110 SE[1]
application focus—process development applications[1]
process capability—deep silicon plasma etching[1]
capabilities—very high aspect ratio trench etch and profile control[1]
configuration—multiple configurations with minimum technical intervention[1]
System type—plasma etch system[4]
Supported components—MEMS and 3D-IC components[1]
Control capability—very high aspect ratio trench etch and profile control[4]
Physical description—compact[1]

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Sources (4)Every fact above is drawn from these public sources
  1. [1]web.archive.orgweb.archive.org
  2. [2]cns1.rc.fas.harvard.educns1.rc.fas.harvard.edu
  3. [3]waferpedia.comwaferpedia.com
  4. [4]waferpedia.comwaferpedia.com