Waferpedia

Comparison ledger

0010 47763versusAPS

Applied Materials 0010 47763, SPTS APS, side by side. Every value shown is drawn from the cited encyclopedia entries.

Side-by-side comparison of selected equipment models
Attribute
0010 47763Applied Materials
APSSPTS
OEMApplied MaterialsSPTS
CategoryEtchEtch
Wafer size——
Process node——
Introduced——
Production run——
Lifecycle——
Lifecycle milestones——
Control system——
Generation——
FamilyApplied Materials 0010 47763SPTS APS
Specifications
Configuration2nd Source New[1]—
TypeMonopolar Dual Heated[2]—
DescriptionASSY, ESC, BONDED, MONOPOLAR DUAL HEATED[3]—
Possible MaterialsAl2O3 (aluminum oxide) or AlN (aluminum nitride)[2]—
Model0010-47763[1]—
OEMApplied Materials[1]—
Material (possible)Al2O3 (aluminum oxide) or AlN (aluminum nitride)[2]—
ApplicationFixing wafers in etching process (PVD, CVD, ETCH)[2]—
Quantity available (source)1[2]—
System type—ICP-based high density plasma source[4]
Optimization target—Dielectric etching[4]
Processing mode—Single wafer processing[4]
Clamping—Electrostatic clamping[4]
End-point detection—Optical Emission Spectroscopy (EOS) and laser reflectometry/interferometry[4]
Gases available—O2, Ar, CHF3, He, C4F8, SF6, H2[4]
Plasma source type—ICP (inductively coupled plasma) high density plasma source[4]
Available gases—O2 (0-100 sccm), Ar (0-100 sccm), CHF3 (0-100 sccm), He (0-500 sccm), C4F8 (0-100 sccm), SF6 (0-100 sccm & 0-500 sccm), H2 (0-50 sccm)[4]
Wafer clamping—Electrostatic clamping (no EBR required)[4]
Wafer voltage biasing—Independent from the ICP[4]
Process chamber—Single wafer processing with loadlock[4]
Process type—ICP-based high density plasma source[4]
Etch materials—Dielectrics: SiO2, SixNy, SiC, Al2O3, glass types[4]
Wafer bias—Wafer voltage biasing independent from the ICP[4]
Wafer handling—Loadlock/chamber transfers for single wafer processing[4]
Automation—Control software offering fully automated processes[4]
Process gases—O2 (0-100 sccm), He (0-500 sccm), SF6 (0-100 sccm), H2 (0-50 sccm), plus Ar, CHF3, C4F8[4]
Stated processes—BARC_Slow, Si3N4_Smooth, SiO2_PR_1:1, SiO2_PR_2:1, SiO2_PR_3:1, SiO2_PR_3:1_SOFT, SiO2_PR_5:1, SiO2_PR_soft, Pi_vertical, Pi_tapered, Fused_silica, Pyrex, LiNbO3_wafers, Chamber clean[4]
Chuck temperature—10 °C for most processes, 20 °C for fused silica, 25 °C for Pyrex, -10 °C for LiNbO3[4]
Maximum etch time—20 minutes for processes marked with *; longer etches are split into steps with an automatic O2 dry clean between each[4]
Wafer cooling check—Helium leak-up rate (LUR) must not exceed 200 mtorr/min[4]
Plasma source—ICP-based high density plasma source[4]
Wafer biasing—Independent from ICP[4]

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Sources (4)Every fact above is drawn from these public sources
  1. [1]inventory listing
  2. [2]saulcontrol.comsaulcontrol.com
  3. [3]getspares.comgetspares.com
  4. [4]epfl.chepfl.ch