Waferpedia

Comparison ledger

0010 47763versusRapier

Applied Materials 0010 47763, SPTS Rapier, side by side. Every value shown is drawn from the cited encyclopedia entries.

Side-by-side comparison of selected equipment models
Attribute
0010 47763Applied Materials
RapierSPTS
OEMApplied MaterialsSPTS
CategoryEtchEtch
Wafer size—Silicon and Silicon on Insulator (SOI) wafers
Process node——
Introduced——
Production run——
Lifecycle——
Lifecycle milestones——
Control system——
Generation——
FamilyApplied Materials 0010 47763SPTS Rapier
Specifications
Configuration2nd Source New[1]—
TypeMonopolar Dual Heated[2]Optimized Deep Reactive Ion Etching (DRIE) system[4]
DescriptionASSY, ESC, BONDED, MONOPOLAR DUAL HEATED[3]—
Possible MaterialsAl2O3 (aluminum oxide) or AlN (aluminum nitride)[2]—
Model0010-47763[1]—
OEMApplied Materials[1]—
Material (possible)Al2O3 (aluminum oxide) or AlN (aluminum nitride)[2]—
ApplicationFixing wafers in etching process (PVD, CVD, ETCH)[2]—
Quantity available (source)1[2]—
Process type—Optimized Deep Reactive Ion Etching (DRIE) system[4]
Wafer materials—Silicon (Si) and Silicon on Insulator (SOI) wafers[4]
Loader capacity—Single vacuum cassette loader, 25 wafers capacity[4]
Transport robot—Brooks Magnatran 7 transport robot[4]
Plasma source—Dual high density Inductive Coupled Plasma (ICP) source[4]
Clamping—Electrostatic Clamping Chuck (ESC)[4]
Wafer biasing—Radio and low frequencies wafer biasing, with pulsing possibility[4]
Mass flow controllers—High speed digital mass flow controllers[4]
Endpoint systems—Amplified optical emission spectroscopy endpoint system; white light interferometry endpoint system[4]
Software—Powerful software with ramping curves of process parameters with time[4]
Module configuration—Unique, patented dual plasma source with multiple operating modes[4]
RF sources—Two RF independent sources, up to 3 kW each[4]
Gas showers—Two independent gas showers (center and edge zones)[4]
Temperature control—Ranges from -10°C to 30°C[4]
RF wafer biasing—Up to 2 kW with pulsing possibility and duty cycle control[4]
Low frequency wafer biasing—Up to 1.2 kW with pulsing possibility and duty cycle control[4]
Wafer-less conditioning—Chamber plasma conditioning or self-cleaning can run wafer-less if needed[4]
Available process gases—2x SF6 720 sccm; 2x C4F8 500 sccm; O2 300 sccm and 1000 sccm; Ar 500 sccm; N2 100 sccm[4]
Standard process: DRIE Trench—Trench 2 µm: 300 nm/loop; trench >200 µm: 800 nm/loop[4]
Standard process: HAR Hole—10 µm: 200 nm/loop; trench 2 µm: 165 nm/loop[4]
Standard process: DRIE-Nano Trench—350 nm: 150 nm/loop; scallops <50 nm; depth limited to tens of µm[4]
Standard process: Opto—From 130 nm/min to 370 nm/min; continuous etch process; for shallow and accurate etch; less than 2 µm deep[4]
Standard process: Si_Release—~3 µm/min lateral and ~6 µm/min vertical; continuous etch process; isotropic etching of silicon[4]
Standard process: Oxide_RIE—SiO2: 235 nm/min; Si3N4: 110 nm/min; PR etch rate 170 nm/min; thin layers only (<1 µm); O2 cleaning compulsory[4]
Standard process: BARC DUV42P—78 nm/min; Si: 50 nm/min; anti-reflective coating opening after DUV litho[4]
Standard process: Wafer thinning—4.4 µm/min; uniformity +/- 3.5%[4]
Standard process: Dicing—Design dicing streets only (150 µm): 3.4 µm/loop; not for structures <10 µm[4]
Wafer capacity (cassette loader)—25 wafers[4]
Plasma source type—Dual high-density Inductively Coupled Plasma (ICP)[4]
Chuck type—Electrostatic Clamping Chuck (ESC)[4]
Wafer biasing frequencies—Radio frequency (up to 2kW) or low frequency (up to 1.2kW), both with pulsing[4]
RF source power—Up to 3 kW each (two sources)[4]
Temperature control range—-10°C to 30°C[4]
Process gases—SF6 (2x720sccm), C4F8 (2x500sccm), O2 (300sccm & 1000sccm), Ar (500sccm), N2 (100sccm)[4]
Etch type—Optimized Deep Reactive Ion Etching (DRIE)[4]
Target materials—Silicon (Si) and Silicon on Insulator (SOI) wafers[4]
Cassette loader capacity—25 wafers[4]
Chuck—Electrostatic Clamping Chuck (ESC)[4]
Endpoint detection—Amplified optical emission spectroscopy endpoint system and white light interferometry endpoint system[4]
Module sources—Two RF independent sources up to 3 kW[4]
Clamp voltage—Variable clamp voltage[4]
Wafer Capacity—25 wafers (single vacuum cassette loader)[4]
Source Type—Dual high density Inductive Coupled Plasma (ICP)[4]
RF Power per Source—Up to 3kW[4]
Wafer Biasing—RF up to 2kW or low frequency up to 1.2kW, with pulsing[4]
Temperature Range—-10°C to 30°C[4]
Process Gases—2x SF6 (720sccm), 2x C4F8 (500sccm), O2 (300sccm & 1000sccm), Ar (500sccm), N2 (100sccm)[4]
Supported wafers—Silicon (Si) and Silicon on Insulator (SOI) wafers[4]
Dual plasma source—Unique, patented dual plasma source[4]
Target wafers—Silicon (Si) and Silicon on Insulator (SOI) wafers[4]
Cassette loader—Single vacuum cassette loader[4]
Cassette capacity—25 wafers[4]
Module plasma sources—Two RF independent sources, up to 3 kW each[4]

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Sources (4)Every fact above is drawn from these public sources
  1. [1]inventory listing
  2. [2]saulcontrol.comsaulcontrol.com
  3. [3]getspares.comgetspares.com
  4. [4]epfl.chepfl.ch