SUSS MicroTec
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It transfers a pattern from a mask into a photosensitive resist layer on a substrate so that the pattern can be developed and used in later fabrication steps.
Machines of this class typically process coated substrates such as semiconductor wafers or other flat workpieces that can carry a photoresist layer.
It is used in the pattern-definition stage of microfabrication, before the patterned resist is converted into etched, plated, or otherwise modified structures.
Alignment ensures that the mask pattern is placed in the correct position on the substrate so that each exposed feature matches the intended layout.
It is suited to applications that rely on photomask-defined features, including device fabrication, process development, and other precision patterning tasks.
The following facts about the MA 100 E Mask are absent from this record as of this revision. First-hand knowledge or a citation closes a gap; every submission is reviewed before publication.
Fewer than 3 independently cited specifications for the MA 100 E Mask are on record; the remainder await public documentation.
Answerable by: an OEM datasheet, a cleanroom equipment inventory, or an engineer who operated or installed it
No publicly documented production dates or lifecycle milestones (introduction, end of production, EOL) for the MA 100 E Mask are on record.
Answerable by: OEM historical records or a trade-press announcement
No publicly documented variants, configuration options, or revision breakpoints of the MA 100 E Mask are on record.
Answerable by: an OEM product catalog or an engineer who ordered or specified the tool
The control-system platform and OS era of the MA 100 E Mask are not on record.
Answerable by: an engineer who operated it or OEM installation records
No publicly documented failure modes or field errata for the MA 100 E Mask are on record.
Answerable by: a field service engineer, process engineer, or maintenance technician
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Last updated Jul 29, 2026.
The EVG 101 is an advanced resist processing system for spin or spray coating and developing of wafers up to 300 mm.