3650

Automated test systems for semiconductor devices apply digital stimuli, power, and measurement resources to verify device behavior against a test program. Test systems in this class are used with interface hardware such as device interface boards or probe cards to contact packaged devices or wafers during electrical test.

The Chroma 3650 uses a true test-per-pin architecture and flexible site mapping with no slot boundaries for multi-site test. The Chroma 3650 provides up to 640 digital I/O pins on testhead 2. The Chroma 3650 provides per-pin PPMU and frequency measurement. The Chroma 3650 provides 32 MW vector memory and 32 MW pattern instruction memory. The Chroma 3650 supports scan features to 2G depth per scan chain and an ALPG option for memory test. The Chroma 3650 supports 50 / 100 MHz clock rate and 100 / 200 Mbps MUX data rate. The Chroma 3650 specifies edge placement accuracy of ±300 ps.^[1][2]

Systems in this class are applied where semiconductor devices require functional, parametric, and interface verification under automated control. Typical use cases include digital logic validation, memory-related pattern execution, analog stimulus and measurement, and screening of devices before downstream assembly or shipment.