STS 8200

Semiconductor test systems apply electrical stimuli to devices and measure the responses against programmed limits. Test and probe equipment is used to characterize or screen devices before final shipment, and in some flows it is also used at wafer level before singulation and packaging.

The STS 8200 uses a modular architecture with universal slots that accept different resource cards and application kits. The STS 8200 resource set includes timing measurement, analog measurement, floating source-measure resources, digital resources, and control-bit resources. The STS 8200 platform also offers application kits and specific test heads for explicit test functions and test methodologies. The STS 8200 supports open-architecture C++ programming of test resources.^[3][4]

Test and probe systems sit in electrical verification stages rather than in deposition, lithography, etch, or metrology process modules. Such equipment is typically used after device fabrication has created testable structures, and it can be used either before dicing at wafer probe or after assembly for final electrical test.

Electrical test systems in this class are used for device characterization, production screening, and binning across analog, mixed-signal, and power semiconductor flows. Probe-based use supports wafer sort of die before separation, while package-based use supports outgoing electrical verification after assembly.