Tokyo Electron
Clean Track Act 8
The Tokyo Electron Clean Track ACT8 is an industry-standard wafer coater and developer for photolithography. The Clean Track ACT8 supports DUV lithography with an in-line exposure unit interface, ULPA chemical filters, and high-precision ovens. The Clean Track ACT8 is configured for 100 mm wafers with optional conversion to 150 mm, and is also available for 8 inch wafers.[1][2][3]
Wafer size
Interface Unit (IRA) for Canon FPA-3000 i5 stepper including one multi-buffer unit and Wafer edge exposure (WEE)
Produced
1997–
Gas delivery
Chemical Cabinet 2:[3]
What it is
General reference — not yet source-verifiedCoater and developer tracks apply liquid photoresist or related coatings to wafers, carry out controlled bake and chill steps, and perform wet development after exposure. Coater and developer tracks are part of the photolithography module set that prepares wafers for pattern transfer and then reveals the latent image formed by the exposure step.
How it works
General reference — not yet source-verifiedCoater and developer tracks generally move wafers by robotic handling between load positions, adhesion preparation, spin coating modules, bake plates, chill plates, and developer modules. Spin coating generally spreads liquid chemistry across the wafer by rotation, while thermal modules condition solvent content and film properties before and after exposure. Developer modules generally dispense aqueous developer in a controlled manner to dissolve the exposed or unexposed regions of the resist, depending on resist tone.
Where it fits in the process flow
General reference — not yet source-verifiedIn fab use, a coater and developer track is placed after wafer surface preparation and before the pattern transfer module sequence. A track prepares the resist film before exposure, returns the wafer for post-exposure thermal treatment where required, and develops the image before downstream inspection, etch, implantation, or deposition steps that use the resist as a patterned mask.
Applications
General reference — not yet source-verifiedCoater and developer tracks are used for resist coating and wet development in integrated circuit, microelectromechanical, compound semiconductor, and microfabrication patterning flows. Coater and developer tracks can also support auxiliary lithography materials such as adhesion promoters and antireflective layers when configured for those chemistries.
What do the numbers mean?
Vacuum & pumping2
Wafer handling13
- Wafer size
- Interface Unit (IRA) for Canon FPA-3000 i5 stepper including one multi-buffer unit and Wafer edge exposure (WEE)[2]
- Process Block with High Speed Transfer Mechanism:[2]
- TCP, Transfer chill plate (qty 1)[2]
- Interface unit
- Interface Unit (IRA) for Canon FPA-3000 i5 stepper including one multi-buffer unit and Wafer edge exposure (WEE)[2]
- Software package
- TEL GEM on-line software; Cascade wafer flow software; System log down software[2]
Gas & chemistry5
Control & software10
- Temperature & Humidity control unit for Coater[2]
- Temperature Control Rack:[2]
- Software Package:[2]
- Interface for stepper
- Interface Unit (IRA) for Canon FPA-3000 i5 including multi-buffer and WEE[2]
- Interface unit
- Interface Unit (IRA) for Canon FPA-3000 i5 stepper including one multi-buffer unit[2]
Configuration & options21
- Single Block[2]
- Extra 5 gallon Stainless steel canisters (qty 5)[2]
- LHP, Low temp hotplate (qty 6)[2]
- HHP High Temp. Hotplate (qty 2)[2]
- CPL, Chill plate (qty 7)[2]
- ADH, Adhesion promotor unit (qty 2)[2]
- Programmable bowl wash system for coater (qty 1)[2]
- Thermocon module for chill plate (qty 4)[2]
- Water circulation unit (qty 4)[2]
- Extra 5 gallon Stainless steel canisters (qty 2)[3]
- Pressurized tank for HMDS (qty 1)[3]
- Buffer tank for thinner, 3 liter (qty 2)[3]
- Dual block[4]
Vintage & configurations
Documented models & variants
| Designation | Generation | Vintage | Changes | Source |
|---|---|---|---|---|
| Clean Track Act 8 | — | 2001 | One source lists 2001 Vintage and another lists 2002 Vintage for the same model. | Equipment inventory listing[3] |
| Dual block | — | 1999 | Dual block configuration, 2C/2D, 6 inch wafers | Equipment inventory listing[4] |
| Single block | — | 2002 | Single block, 8 inch wafers, with interface for Canon stepper | Equipment inventory listing[2] |
What does it need to run?
Site utility requirements, footprint, and infrastructure needed to install and operate this tool. Sourced from public records.
- ConfigurationPhotoresist coater unit with 4 dispenses through Millipore Intelligen pumps (qty 2)[2]
- ConfigurationDeveloper unit with 1 solution dispensed through H-nozzle (qty 2)[2]
- ConfigurationAdditional developer dispense for 1 DEV unit (qty 1)[2]
- ConfigurationProgrammable PTI exhaust controller (qty 4)[2]
- ConfigurationChemical Cabinet 2:[3]
- Spinning unitsBCT (bottom coater), COT (coater), DEV (developer)[1]
- Equipment typeCoater / Developer[2]
Where are the manuals?
Generated from public-source data on file. Enter your email to access — nothing is published; details are routed privately.
Not publicly documented
Field notes
No research found yet — worked with this tool? Share what you know.
Frequently asked questions
What type of equipment is Tokyo Electron Clean Track Act 8?General reference — not yet source-verified
It is a wet processing and clean track system used for wafer handling and surface preparation in semiconductor manufacturing.
What does this class of machine do in a fab?General reference — not yet source-verified
It moves wafers through controlled wet process modules that clean, rinse, dry, or otherwise condition the wafer surface before later fabrication steps.
Why is contamination control important for this class?General reference — not yet source-verified
Because these systems handle wafers in preparation steps where particles, residues, or surface variation can affect downstream patterning and device formation.
Where does this class sit in the process flow?General reference — not yet source-verified
It is typically used in the front-end portion of wafer processing, where surface condition must be controlled before later lithography or other process operations.
Not publicly documented
The following facts about the Clean Track Act 8 are absent from this record as of this revision. First-hand knowledge or a citation closes a gap; every submission is reviewed before publication.
The control-system platform and OS era of the Clean Track Act 8 are not on record.
Answerable by: an engineer who operated it or OEM installation records
No publicly documented failure modes or field errata for the Clean Track Act 8 are on record.
Answerable by: a field service engineer, process engineer, or maintenance technician
The process node or technology generation of the Clean Track Act 8 is not on record.
Answerable by: an OEM datasheet or a fab qualification report
No publicly documented compatible parts, consumables, or accessories for the Clean Track Act 8 are on record.
Answerable by: an OEM parts catalog or a service engineer
No publicly hosted manuals, SOPs, or datasheets for the Clean Track Act 8 are on record.
Answerable by: university cleanroom staff or an OEM application specialist
No research found yet — worked with this tool? Share what you know.
Sources & citations
Sources (14)Every fact above is drawn from these public sources
- [1]epfl.ch — epfl.chepfl.ch
- [2]Equipment inventory listing
- [3]Equipment inventory listing
- [4]Equipment inventory listing
- [5]semiconductoronline.com — semiconductoronline.comsemiconductoronline.com
- [6]Inventory photo
- [7]Inventory photo
- [8]Inventory photo
- [9]Inventory photo
- [10]Inventory photo
- [11]Inventory photo
- [12]Inventory photo
- [13]TEL Tokyo Cleantrack ACT-8 - C2MI — c2mi.cac2mi.ca
- [14]Tokyo Electron | Products CLEAN TRACK ACT M — tel.com (Dec 30, 2006)web.archive.org
Last updated Oct 20, 2026.
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